Wave Semiconductor is developing Wave Threshold Logic™ (WTL), a new silicon logic implementation technique based on state-holding threshold gates, monotonic switching and multi-wire encoding. WTL is a new silicon algebra that addresses many critical DSM challenges: reduce dynamic power, accelerate timing closure and increase reliability. Wave Threshold Logic prevents the glitching found in Boolean logic, eliminating the requirement for pipeline registers and global clocks. The result is a ~50% reduction in dynamic power, delay-insensitive circuitry that is immune to PVT variations, and lower total costs.

WTL will find its first commercial form as ASICs and ASSPs, followed by IP blocks. The ultimate delivery vehicle is the SD-ASIC family of programmable platform ICs. Our team envisions a family of standard-product devices that fully exploit the potential for WTL: lowest dynamic and static power, theoretical-limit performance and maximum yield.

We are in late-stage development of WTL, and are currently working with a limited number of partners to implement their ASSPs, ASICs and IP in WTL. If you are facing design challenges with power, performance and reliability, please contact us (info@wavesemi.com) to request a copy of our WTL Primer white paper. Then let’s start a discussion about how Wave technology can help you solve your critical design challenges.